Motorola chip unit looks to network edge
- — 30 April, 2002 08:05
Motorola's Semiconductor Products Sector on Monday pushed its programmable network processor lineup toward the edge of the service-provider network, announcing the C-3e Network Processor and Q-3 Traffic Management Coprocessor.
Programmable network processors, sometimes called NPUs (network processing units), can process data traffic fast enough to keep up with a high-speed connection but also can be upgraded through software to support new standards or carry out new services. As NPUs mature and decline in price, and as service providers shift their investment toward the edge of the network, network chip makers like Motorola are rolling out lower-speed parts.
The C-3e is designed for access equipment at the edge of the network and can process packets at a rate of 3G bps (bits per second), according to Motorola. The chip may go in to media gateways, cable modem termination systems, DSL (digital subscriber line) access gear, multiservice access platforms and even equipment for 3G (third-generation) and 2.5G wireless data networks, according to the company. The architecture of the chip allows makers of access routers and other devices to build in support for nearly any protocol they want to offer customers, according to Motorola.
Motorola will discuss the C-3e Wednesday at the Embedded Processor Forum, in San Jose, California.
Service providers are looking to differentiate themselves with specialized services such as voice over IP that require guaranteed quality of service, as well as continuing to provide existing technologies such as ATM (Asynchronous Transfer Mode) and Frame Relay," said Larry Walker, vice president of strategy for Motorola's networking and computing systems group.
"Network processors, especially ones that have pretty rich sets of functionality, turn out to be very useful," Walker said.
The programmable chips will make it possible for service providers to set up new services for customers relatively quickly and easily, Walker explained. Carriers may be more comfortable investing in a new piece of equipment knowing that if the protocols it uses undergo changes in the future, they won't have to send a technician out to the device to change the hardware.
"If you want to change something, that's a time when the idea of being able to download new code really shines," he said.
The C-3e joins the C-5e, a 5G-bps chip currently shipping, in Motorola's C-Port Network Processor Family. The technology for both came out of C-Port, a startup that Schaumburg, Illinois-based Motorola acquired about two years ago. Device manufacturers can migrate software relatively easily from one chip to the other, executives said. Software for both chips can be written using the C language, they said.
Motorola is still working on moving up in speed, developing a 10G-bps NPU that will have more intelligence as well as greater speed, said Bob Gohn, vice president of marketing. It should come out next year, he said.
The Q-3 Traffic Management Coprocessor, a chip that can be integrated with the C-3e, can carry out advanced traffic management functions such as shaping, policing and monitoring the throughput of thousands of simultaneous connections.
Motorola's decision to expand its focus into lower-speed connections is part of a broader trend in which NPUs are becoming more economically feasible at the edge -- where their flexibility is even more valuable than at the core, according to Linley Gwennap, principal analyst at The Linley Group, in Mountain View, California. Intel was a pioneer in that space with its IXP1200 processor, he said.
"Intel has demonstrated that NPUs can be very useful and popular closer to the edge of the network," Gwennap said. "The guys who started higher are starting to step down."
One advantage of Motorola's architecture is that it can carry out many basic functions, such as ATM and Packet over SONet (Synchronous Optical Network) functions, that some other network chip makers assign to coprocessors.
"The C-3e and the C-Port family have the unique ability to emulate various types of hardware protocols," Gwennap said. Although coprocessors can deliver good performance, Motorola's approach can reduce the number of chips required and simplify the hardware design, he said.
The C-3e NP and Q-3 TMC both are expected to ship in sample quantities in the third quarter and will carry suggested list prices of US$225 and $235, respectively.