First impression on unpacking the Q702 test unit was the solid feel and clean, minimalist styling.
Snowflakes, seashells and IBM's future chips
- — 04 May, 2007 09:36
IBM is learning from naturally-forming patterns that create seashells, snowflakes and tooth enamel to build its next family of computer chips. The chips made with the new process will eventually be used in IBM's server product lines.
In an announcement Thursday, IBM said the "self-assembling nanontechnology," expected to be integrated into its chips in 2009, increases the flow of electrical signals by 35 percent while using 15 percent less power in comparison with traditional chip-building techniques.
The new process involves the use of "airgap" insulation for the millions of electrical paths, or ultrathin copper wires, that make up each chip. Carbon silicate glass insulation is now used to keep the electrical signal in each path separated so data can be processed properly. Without proper insulation, the signals could become jumbled.
Airgap technology relies on a vacuum between the wires to keep data paths separated. Vacuum is a better insulator than carbon silicate, which becomes more fragile as chip components and circuits get smaller, the company said.
"This is the first time anyone has proven the ability to synthesize mass quantities of these self-assembled polymers and integrate them into an existing manufacturing process with great yield results," said Dan Edelstein, an IBM fellow and chief scientist of the self-assembly airgap project. "By moving self-assembly from the lab to the fab, we are able to make chips that are smaller, faster and consume less power than existing materials and design architectures allow."
IBM researchers developed the airgap technique by studying the concepts behind self-assembling processes in nature. The new process uses a mix of chemical compounds that's poured onto a silicon wafer that already contains the wired chip patterns. That assembly is then baked. The result is a 300 millimeter-wide chip that has trillions of uniform holes, each about 20 nanometers in diameter. That's about five times smaller than is possible with the light-masking and chemical etching techniques now in use.
Once the holes are formed, carbon silicate glass is removed from the assembly, creating the airgap between the wires.
The technology is expected to provide the equivalent of two generations of Moore's Law performance improvements in a single step, according to IBM. Moore's Law, named for Gordon Moore, a co-founder of chip maker Intel, predicted in 1965 that the number of transistors on a chip would double every 24 months as part of the evolution of chip design and power.