First impression on unpacking the Q702 test unit was the solid feel and clean, minimalist styling.
AMD preparing for Hammer release
- — 01 February, 2002 11:56
Advanced Micro Devices (AMD) is on track to ship sample versions of its upcoming 64-bit processor to customers next quarter, an executive said in a Banc of America Securities Webcast on Wednesday.
Before chip makers ship large quantities of a new chip, they usually make limited quantities, or samples, available to system manufacturers to debug the chips and to test compatibility with the manufacturer's hardware.
AMD's first 64-bit processor family, codenamed Hammer, will be shipping in large quantities by the end of this year, following on the tail of AMD's 32-bit processor aimed at servers and workstations, the Athlon MP, which is "just starting to get traction," said Ben Anixter, vice president of external affairs for AMD. There are now three motherboard manufacturers offering the Athlon MP chipset, Anixter said in the Webcast. These manufacturers in turn sell the motherboards to makers of servers and workstations.
ClawHammer, the first member of AMD's Hammer family, which is aimed at one- and two-processor servers, workstations, notebooks and high-end desktops, will be sampled by PC and server manufacturers by next quarter, he said. Eighty percent of all servers sold are one- and two-processor servers, Anixter said.
AMD will also make samples of the second member of its Hammer family available to server makers by the second quarter of this year, with volume shipments expected in the first quarter of 2003, Anixter said. Called SledgeHammer, this processor is aimed at servers with two or more processors, he said.
Because Hammer is a family of 64-bit processors, they are better suited to running large databases and corporate applications, such as enterprise resource planning applications and data mining software.
AMD's existing processors are 32-bit chips, which means they cannot address more than 4G bytes of RAM. AMD unveiled the blueprint for the Hammer architecture at the Microprocessor Forum in October.