During a demonstration to show the power of the P4, Albert Yu, senior vice president and general manager for the Intel architecture group, giggled merrily as he tapped his fingers on a touch-screen monitor that displayed a virtual pool of water. The resulting ripples looked amazingly real, thanks in part to the P4's capabilities, he said.
The P4, scheduled to ship at 1.4-GHz and 1.5-GHz speeds in the fourth quarter of this year, is also adept at handling other multimedia and internet tasks, he said. Yu demonstrated a P4-based system's capability to quickly encode video from a camera to a PC. Running next to a PIII-based system, the P4 system flew through the task, providing fluid video motion and handily beating the PIII system.
Yu ran down a laundry list of new features on the P4, a 42-million transistor chip he said started on "a blank piece of paper." Its NetBurst micro-architecture is Intel's first new micro-architecture since the Pentium Pro in 1995.
The new micro-architecture includes several new technologies, he said. A hyperpipelined technology doubles the processor's pipeline depth to 20 stages from the PIII's 10 stages. A rapid execution engine runs the processor's Arithmetic Logic Units at twice the core frequency. A new 400-MHz system bus provides 3.2-gigabytes-per-second transfer speeds to Rambus memory. And a new Execution Trace Cache - an advanced version of L1 cache - supplements the chip's 256KB of on-die L2 cache.
In his last P4 demonstration, Yu showed a 1.4-GHz P4 ramp up to a speed of 2002 MHz (according to the display). Intel executives later pointed out that the chip didn't require any special cooling techniques; it was just a regular air-cooled system. An Intel spokesperson noted that 18 months ago the company demonstrated its first 1-GHz processor. Moore's Law - the precept by Intel chair emeritus Gordon Moore that computing power doubles every 18 months - remains in effect, he noted.
Yu also trumpeted Intel's mobile processor advances, including its two-speed SpeedStep mobile PIII chips and its low-voltage CPUs that can accommodate up to six hours of battery life.
However, battery life grows when the rest of the system uses less power, he said. Yu did not mention Intel competitor Transmeta, which claims its processor enables batteries to last for 8 hours.
Yu discussed progress on Intel's 64-bit Itanium processor. The company has sent 6000 prototype systems to help software developers work on new operating systems and applications. Yu said 350 applications are committed to the system.
Itanium systems won't be available for customer evaluation until late this year. Intel continues to produce the Xeon - available this week in a 1-GHz configuration - for its workstations and servers.
At a question session after the keynotes, Craig R. Barrett, president and chief executive officer, fielded questions about Intel's Rambus penchant. The company continues to endorse the more expensive Rambus in the face of industry benchmarks that show little performance gain over less expensive SDRAM.
"We still support Rambus," Barrett said, adding that Intel considers the memory appropriate for high-end systems. He noted, however, that other memory types could be more appropriate for lower price points.
"We don't want to price ourselves out of certain price points," he said.
Barrett wouldn't elaborate on whether Intel plans to develop a P4 chip set that supports Double Data Rate DRAM, the upcoming competition to Rambus. "It depends on economics," he said.
Barrett also acknowledged some of the execution problems Intel encountered over the last year, specifically surrounding its trouble-plagued 820 chip set.
Management issues caused some of the problems, Barrett said. Intel simply overlooked details as it worked to make a technology leap while rapidly expanding its product line, he said.