The new processors include design tweaks that improve on the performance of Intel's current StrongARM chips without greatly increasing the amount of power consumed, a feature that could enable hardware makers to build handheld computers that run speech applications and even MPEG video clips, the source said.
The disclosure comes on the eve of Intel's twice-yearly developer forum in San Jose, California. The chip maker is due to discuss technology improvements it has made to StrongARM this week, although it's not clear yet whether the company will provide details about actual new products. An Intel spokesman declined to comment.
Also on the agenda this week at Intel Developer Forum (IDF), the chip maker is expected to disclose more details about the Pentium 4, a follow-on to the Pentium III, due in the fourth quarter this year. Intel is also due to announce a 1GHz Xeon processor with 256K bytes of cache. The upcoming Xeon processor is designed for two-way servers and workstations. The fastest Xeon today runs at 933MHz.
Codenamed Coyanosa, one of the new StrongARM processors is a follow-on to the SA 110 and will launch with a clock speed of 600MHz, according to the source. The second processor, codenamed Cotulla, is modelled after Intel's SA 1110, and is expected to debut at 400MHz, the source said.
Cotulla will be an integrated processor that includes built-in support for USB (universal serial bus), infrared communications and an LCD (liquid-crystal display) screen. Cramming this extra functionality into a single chip should allow hardware makers to use smaller motherboards, which could lead to smaller handheld products, according to the source.
Cotulla is also expected to offer advantages in terms of power consumption. At 400MHz, the processor will debut at twice the clock speed of the StrongARM 1110, but won't consume significantly more power. This may allow device manufacturers to offer PDAs with enough horsepower to run speech applications and play MPEG video clips, assuming enough storage is available, the source said.
The improvements are derived from design improvements that Intel has made to the StrongARM core. The improvements include the introduction of a memory caching system called "write-back cache," an improvement on the "write-through cache" employed in current StrongARMs, the source said.
"Write-back is more efficient, but write-through is historically easier to do," said Nathan Brookwood, principal analyst with consulting firm Insight 64 in Saratoga, California. "The usual way that systems progress is to start with write-through and then progress to write-back in later designs."
Cotulla also features a seven-stage pipeline, instead of the five-stage pipeline employed in Intel's current StrongARM, the source said. Deepening the pipeline is one way of improving the clock speed of a processor.
StrongARM is based on a processor design licensed from UK-based chip design company ARM Holdings PLC. Intel acquired StrongARM from Digital Equipment (now part of Compaq Computer) about three years ago.