YEAR END - Tracking AMD's road to recovery

AMD's product roadmap lays out several key milestones the company needs to meet to regain its footing in the CPU market.

As this year comes to a close, AMD executives won't be sorry to put 2007 behind them. Battered by rising debt, shrinking market share and mounting financial losses, AMD is counting on a comeback in 2008. But can the struggling chip maker make good on its promises to customers and investors that better times lie ahead?

Many of AMD's current troubles are tied to Barcelona, the first version of its Quad-Core Opteron processor. Repeated delays of this chip weakened AMD's finances and undermined confidence in the company's ability to deliver new products as promised. Rebuilding that lost confidence among corporate users and the financial community won't be easy and the company can ill afford further missteps.

Over the next six months, there are several milestones that AMD must hit in order to get back on track. The first, and arguably most important, involves volume shipments of Barcelona, scheduled to happen during the first quarter. AMD desperately needs this chip to shore up flagging revenue from its commercial business and to take back ground lost recently to Intel in the server market.

With a bug that was recently discovered in Barcelona fixed, AMD expects the latest version of the chip to start coming out of its manufacturing plants in January. Barcelona shipments are expected to rise throughout the first quarter, reaching "full volumes" and widespread availability of servers based on the chip during the second quarter, according to Phil Hughes, an AMD spokesman.

Another early milestone to look out for involves Shanghai, the second version of the Quad-Core Opteron chip that's set for volume production during the second half of 2008. AMD will produce Shanghai with a 45-nanometer manufacturing process that is one generation ahead of the 65-nanometer process used to make Barcelona.

The numbers used to describe chip manufacturing processes refer to the average size of the smallest features that can be created on a chip. The smaller these features can be made, the better. Making these features smaller gives chip makers the ability to shrink the overall size of a chip, thereby reducing unit manufacturing costs, or to add new features. Chips made using a more advanced process may also consume less power and run faster than other versions. But semiconductor production is as much art as it is science, and moving to a more advanced process is fraught with risks.

In the case of Shanghai, AMD will take advantage of the 45-nanometer process to triple the size of the Level 3 (L3) cache, from 2M bytes in Barcelona to 6M bytes. The L3 cache is a shared pool of memory that can be accessed by all four cores on the chip. Each core has 512K bytes of Level 2 (L2) cache. When data is moved out of the L2 cache, it moves into the L3 cache instead of main memory, meaning that the core can access this information more quickly than would otherwise be possible.

Like AMD's existing server lineup, Barcelona and Shanghai also include an on-chip memory controller that further helps to increase performance.

The memory structure used in the Quad-Core Opteron is different from Intel's server chips, which do not use an L3 cache and do not have an on-chip memory controller. Instead, Intel's quad-core Xeon 7300 server chips have 8M bytes of shared L2 cache. Since Intel processors actually pack two dual-core chips inside a single package, the L2 cache is divided into two parts, with 4M bytes on each silicon chip. Intel's processors do not use an on-chip memory controller.

Boosting the Quad-Core Opteron's L3 cache with Shanghai should give AMD's quad-core chips the opportunity to stretch their legs, but the company has to make them first. The first working samples of Shanghai are due out of AMD's factory in Dresden, Germany, in January, according to recent remarks by Mario Rivas, executive vice president of AMD's Computing Products Group. If these samples arrive late or suffer from unexpected technical problems, this could delay volume production of Shanghai to late 2008 or even early 2009. Conversely, working samples that arrive on schedule and meet or exceed expectations would give AMD an added boost.

Besides the server segment, there are a couple of key product milestones onAMD's roadmap for desktop and mobile processors that bear watching as well.

For example, the company plans a first-quarter rollout of Perseus, a package of chips aimed at PCs for the corporate market and centered on a quad-core or triple-core processor and an RS780 or SB700 chipset. A dual-core version will also be rolled out. During the second quarter, AMD plans to roll out Puma, a chip package designed for notebooks. Puma is based on a new processor, called Griffin, expected to offer better performance and power efficiency than AMD's existing line of mobile processors.

AMD plans to offer additional details of its plans and upcoming products at the Consumer Electronics Show to be held in Las Vegas during January, Hughes said.

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