Intel plans to announce on Monday the first major upgrade to its Xeon processor product line since June 2004, according to sources familiar with Intel's plans.
The new chips are expected to have clock speeds as high as 3.6GHz, which is in the same range as Intel's existing Xeon products, but they will have a larger, 2M-byte L2 cache, according to Intel. They will be part of Intel's Xeon DP family of processors, which are designed for single and dual-processor servers and workstations.
"This actually is yet another vector where Intel will be delivering increased performance and business value beyond gigahertz," said Phil Brace, director of marketing with Intel's Digital Enterprise group, who confirmed only that Intel would be announcing the new Xeons and a new line of Pentium 4 processors called the 6xx series, within the next few weeks.
The 6xx series will be Intel's first Pentium processor to be able to process data in larger, 64-bit chunks, and are also expected to come with 2M bytes of L2 cache. Sources said that the 6xx announcement is being planned for February 21.
Intel is also readying a refresh of its Xeon MP chip line, which is designed for multiprocessor systems. The high-end MP processor, code-named Potomac, is expected to ship with clock speeds as high as 3.3GHz and with an 8M byte L3 cache, Intel said. It is expected to be available, along with an entry-level Xeon MP processor code-named Cranford and a new chipset called the E8500, within 90 days, Intel said.
The E8500 chipset, which is code-named Twin Castle, will have several new capabilities that will make it particularly suitable for dual-core Xeon processors, which are expected to begin shipping next year. "This platform has actually been architected for dual-core," said Brace. "A number of these capabilities -- including new memory technology, new I/O, new front side bus architecture -- have really been designed with dual-core in mind," he said, speaking during a conference call with press on Tuesday.
For enterprise users, the most remarkable Xeon enhancement will be a technology called demand-based switching, said Dean McCarron, principal analyst with Mercury Research Inc. in Cave Creek, Arizona. Demand-based switching slows down the processor when it is not in use so that it requires less power and creates less heat. Already available in notebooks, the technology will make its Xeon debut with the Twin Castle systems.
"It's pretty significant," McCarron said. "This reduces that idle power consumption by turning things down, so it does make a credible difference."
Brace made a point of emphasizing the company's dual-core and 64-bit x86 products, two areas where Intel has been accused of lagging behind rival Advanced Micro Devices Inc.
Brace predicted that 80 percent of Intel's Xeon product would support the EM64T instruction set, which allows the chip to process instructions in 64-bit mode. "We shipped our first million units of 64-bit Intel Xeon processor in just under 6 months and we're expecting the second million to ship by the end of this month," he said. Since the first 64-bit Xeons were launched last June, the product has become "the fastest-ramping server processor in Intel's history," he said.
Intel initially dismissed the idea of supporting 64-bit computing on its 32-bit x86 systems, and though Xeon is not yet widely used in 64-bit mode, Intel obviously has no desire to be perceived as laggard in this area, McCarron said. "Clearly, AMD was getting some traction with their 64-bit message, and Intel's a competitive company. They're going to respond to a competitor gaining ground on them."