Vendors to show present and future of processors

The inner secrets and performance specifications of unreleased microprocessors for desktop and notebook PCs, servers and wireless handheld devices will be the highlights of the four-day Microprocessor Forum, to be held October 14 through October 18 in San Jose, California.

Various companies will demonstrate their latest designs during the event, including IBM Corp., Intel Corp., Advanced Micro Devices Inc. (AMD), Via Technologies Inc., Fujitsu Ltd., and Cisco Systems Inc., among others. Presented by the industry newsletter Microprocessor Report, the conference will combine technical sessions with discussion panels on topics including high-end chip comparisons, embedded communications processors, and the future of the microprocessor industry.

IBM is scheduled to discuss its 64-bit PowerPC chip, which has drawn a lot of attention from the Macintosh and Linux communities. Since the PowerPC chip uses a different instruction set than chips used with Microsoft Corp.'s Windows technology, it can't be used in Windows PCs. It is expected to begin its life in low-end servers, and will also appear in workstations over time, but is "the natural upgrade path for the Apple community," said Kevin Krewell, senior editor of the Microprocessor Report in San Jose. "(The PowerPC) is the answer to the Macintosh question of 'Where do we go from here?' " Krewell said. The processor will ship in the second half of 2003, he said. IBM did not immediately return calls to confirm the PowerPC's shipping date.

Intel's forthcoming mobile processor, Banias, will also be discussed, with new details beyond the ones already discussed at the Intel Developer Forum last month, Krewell said. New details discussed at the MPF will include specifications for Banias' chipset, code-named "Odem," as well as the design trade-offs required in trying to make Banias a high-performance chip with low power consumption, Krewell said. Intel didn't immediately return calls to confirm the conference details.

Additionally, Intel's John Crawford, an Intel fellow with the enterprise platform group, will discuss in his Tuesday keynote speech how the company will take advantage of advances in Moore's Law that will allow a billion transistors to be placed on a single chip by the end of the decade. Crawford is expected to talk about power management techniques, and the need for capabilities beyond clock rate in new processors.

Extending its philosophy of bringing moderate computing power to the masses at low prices, Via, based in Taipei, will introduce the U.S. version of its Nehemiah processor core, the company said. It is expected to arrive in low-power versions for multimedia applications at clock speeds of 1.2GHz and up, and will ship next year, it said.

Other announcements expected to occur at the show:

-- AMD will discuss its upcoming server chip, the 64-bit Opteron, focusing on how its Hypertransport interconnect technology makes it easier for IT departments to build a scalable infrastructure.

-- Fujitsu is expected to show its new Sparc chip for Unix servers. This chip, code-named Zeus, was announced by Fujitsu in a release Wednesday. It will run at clock speeds faster than 1GHz with a power-friendly design, Krewell said.

-- Embedded chips based on cores from ARM Ltd. and MIPS Technologies Inc. will also be demonstrated by companies like Toshiba Corp., Motorola Inc., and Samsung Electronics Co. Ltd. ARM will introduce its ARM11 core, and Broadcom Corp. will formally announce a chip with four MIPS (million instructions per second) cores on a single die, according to the companies.

-- Cisco's Toaster series networking processors will make a rare appearance at a trade show or conference, Krewell said. The new T3 processor will support full-duplex 10G bps (bits per second) networks, he said. A representative for Cisco could not be reached to confirm that information.

-- Intel's server group will discuss the upcoming road maps for its Xeon and Itanium server processors, which will compete for attention with the Opteron.

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