Intel will begin making chips in volume on its 90-nanometer (.09 micron) manufacturing process next year, and it released details Tuesday of how the technology has evolved.
Intel's current Pentium 4 processors are made using a .13 micron process. The size of the process refers to the width of the smallest wire on the chip. As the process width shrinks, more transistors can be placed on the chip.
In Intel's 90-nanometer process, the transistors themselves will only be 50 nanometers in length, which makes them the smallest CMOS (complementary metal-oxide semiconductor) transistors currently in production. Pentium 4s use 60-nanometer long transistors. The transistors also feature minuscule gate oxides at 1.2 nanometers thick, or five atomic layers, the width of five silicon atoms. Short transistors and thin gate oxides increase processor speed.
Strained silicon is also used in the new process technique. Strained silicon is a technique where a layer of silicon germanium is deposited on top of a silicon substrate. The atoms in the silicon substrate naturally seek to align themselves with the atoms in the germanium above, stretching the silicon. This allows electrons to flow more smoothly between the two substances, which increases processor speed without having to make any changes to the size of the transistors.
Copper interconnects inside chips made with the new process technology use a new dielectric called Low-k to increase transmission speeds within the chip, and lower overall power consumption.
The combination of the short transistors and a strained silicon process unique to Intel puts the company's chip production technology well ahead of its competitors, said Mark Bohr, Intel fellow and director of process architecture and integration. Other companies have talked about strained silicon techniques and 90-nanometer processes, but Intel has already developed SRAM (static RAM) chips based on the process, and will be the first to go into volume production on the process next year, he said.
Intel has been using the 90-nanometer process to make 52M-byte SRAM chips at Intel's fab in Hillsboro, Oregon. [See, "CEBIT - Intel claims a small milestone in chip making," March 21]All chips made using the 90-nanometer process will come from 300 millimeter wafers, the first for an entire chip line, Bohr said. The Oregon fab will be the first to go into volume production of 90-nanometer process chips, followed by Intel's New Mexico and Ireland plants sometime in 2003, Bohr said. Intel's forthcoming Prescott chip will be the first product made on the 90-nanometer process that has been announced, but work is underway on several other chips using the process, he said.
Three-quarters of the process tools used for its .13 micron process can be reused for the 90-nanometer process, saving time and money ramping up to the new production process, Intel said.