IDF - Intel to detail XScale, McKinley and more

Intel Corp. will tout products including its recently announced XScale processor for PDAs (personal digital assistants) and its high-end chips for servers at its developer forum here next week, company executives said in a briefing last week.

Ron Smith, general manager of Intel's Wireless Communications and Computing Group, will give more details on the two processors Intel launched last week for PDAs and other gadgets. The new XScale processors are the company's follow up to its StrongArm chips, which are currently used in devices including Hewlett-Packard Co.'s Jornada and Compaq Computer Corp.'s iPaq. While the top clock speed of the StrongArm processor is 206MHz, XScale was announced at speeds reaching 400MHz.

Sean Maloney, general manager of Intel's Communications Group, will introduce additional chips based on the XScale architecture in his keynote.

"He'll be introducing a whole range of network processors," said Eric Mentzer, vice president and chief technology officer of the Communications Group. Maloney will also launch an I/O processor based on XScale, Mentzer said.

Intel also will give further details of the next server chip in its 64-bit Itanium family, called McKinley. "There will be lots and lots of McKinley," Pat Gelsinger, Intel's chief technology officer, said in the briefing. Intel has given details on the chip at countless trade shows, including the last Intel Developer Forum and the recent International Solid State Circuits Conference (ISSCC) in San Francisco earlier this month, but this may be the final show before the chip's launch, scheduled sometime in the first half of the year.

While it's not quite make-or-break time for the second member of Intel's Itanium family, it is the point where Intel should be releasing more details on the chip, one analyst said.

"There are already pilot configurations with the major OEMs (original equipment manufacturers)," said Nathan Brookwood, principal analyst with Insight 64 in Saratoga, California. While there's not much more Intel can say about the chip physically, it should be ready to give details on implementation, software optimization, as well as discussing McKinley's 870 chipset with motherboard makers, Brookwood said. "The outside world still needs to be brought in on the secret."

While the debut member of the Itanium family was widely regarded as a prototype, its successor is "widely regarded as a useful environment," Brookwood said. "The performance is competitive with RISC (reduced instruction set computing) processors," he said. "It might not be as fast as some of IBM (Corp.'s) Power4 configurations, but it will be a whole lot more affordable."

Mike Fister, vice president and general manager of the Enterprise Platforms Group, will offer details on McKinley, as well as Intel's roadmaps for chipsets and its 32-bit Xeon processors. While it is anticipated that Intel will give details on its upcoming Xeon processors, code-named "Prestonia" and "Foster MP" (multiprocessor), at the show, Gelsinger declined to comment about them.

Both Foster MP and Prestonia will use Intel's hyper-threading technology, which lets a single chip appear as two processors to the software running on it. Prestonia will be built on the smaller 0.13-micron manufacturing process, and feature 512K bytes of on-die cache, Intel has said in the past.

"I think we'll hear a lot about Prestonia," Brookwood said. While the formal launch is expected to come at Germany's CeBIT show, shortly after IDF, Intel will likely give a fair amount of detail at its show. The company should also detail Foster MP, which is expected to launch later this year, Brookwood said.

Intel will also make its biggest push to date with 3GIO, an interconnect technology designed to give improvements over the existing PCI (peripheral component interconnect) technology currently used in PCs.

"We'll be announcing that the specification is going to the PCI-SIG (PCI Special Interest Group)," Gelsinger said. "We'll be using PCI-SIG for the industry standardization body to ensure the full industry buys into it," he said.

Six out of the 10 classes in Intel's interconnect track will focus on the technology. "Last IDF we had one overview class on it," Gelsinger said. "This IDF it essentially dominates the I/O track."

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Douglas F. Gray

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