Intel pushes 10nm chip-making process to 2017, slowing Moore's Law

Intel's 'tick tock' cadence is becoming 'tick tock tock'

It's official: Moore's Law is slowing down.

Intel gave an update on its chip-making plans Wednesday and revealed it will take longer than expected to introduce a new manufacturing process that will yield smaller, faster transistors.

Intel plans to produce its first "10-nanometer" processors in the second half of 2017, CEO Brian Krzanich said Wednesday. Intel hadn't given a start date for the process before, but many observers had expected it to arrive some time next year.

To make up for the delay, Intel has added a new chip design to its roadmap that will appear in the second half of next year, manufactured on its current 14-nanometer process.

Code-named Kaby Lake, the new design will be "built on the foundations" of Skylake, Intel's latest microarchitecture, but with performance improvements, Krzanich said.

The change is a big deal for Intel, and for the PC and server industry at large. Each new manufacturing process leads to smaller, faster transistors, and the regular introduction of new techniques is what's kept Moore's Law ticking along.

In recent years, Intel has alternated between introducing a new manufacturing process one year and a new processor architecture the next, producing what's known as its "tick, tock" cadence.

With 10nm pushed out to 2017 and the new chip design coming next year, it will now be on a "tick tock tock" cadence for the first time. The current 14nm process is the tick, the Skylake microarchitecture is the tock, and now Kaby Lake will be the second tock.

Speaking on Intel's earnings call, Krzanich noted that this won't be the first time the pace of Moore's Law has shifted.

When Gordon Moore made his famous prediction in 1965, he said the number of transistors on a chip would double each year for the following decade. In 1975, he updated that prediction to say transistor count would double every two years.

"These transitions are a natural part of the history of Moore's Law and are a by-product of the technical challenges of shrinking transistors while ensuring they can be manufactured in high volume," Krzanich said.

The pace at which Intel introduces new manufacturing processes had already been slowing, he noted, with roughly 2.5 years passing between its 22nm process and the launch of its current, 14nm process. The nanometer figure refers loosely to the size of the smallest circuits etched into the surface of the chips.

By saying the 10nm process will arrive in 2017, Intel is making official a pattern that has already been under way. It did this partly to give its PC-making customers more certainty about what's coming up.

"The feedback from customers said, 'We want you to be predictable,'" Krzanich said. "That's as important as getting to that leading edge."

He didn't provide details for why the 10nm process has been pushed out, but he suggested the problems were similar to the hiccups it had with 14nm, which also arrived a bit later than expected.

"I'd call it similar to what happened on 14 nanometer," Krzanich said. "On all these technologies, each one has its own recipe of complexity and difficulty."

"The lithography is continuing to get more difficult as you try to scale," he said, referring to the process by which transistor patterns are drawn onto the silicon disks used to produce chips.

He confirmed that Intel does not plan to use a lithography technique called EUV, or extreme ultraviolet, at 10 nanometers.

Intel would like to get back to a two-year cadence when it moves from 10 to 7 nanometers, Krzanich said, but each process is unique, presenting its own challenges in materials science and other areas, so it's too early to say.

"We'll always strive to get back to two years," he said.

James Niccolai covers data centers and general technology news for IDG News Service. Follow James on Twitter at @jniccolai. James's e-mail address is james_niccolai@idg.com

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James Niccolai

IDG News Service
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